Home

Semiconductor & IC Fabrication

Wet Chemicals for Every Node

Semiconductor device fabrication demands the highest purity wet chemicals at every process step. PureTech Materials supplies the complete range of SEMI C1 certified electronic grade solvents, process acids, oxidants, and bases for logic foundry, memory, OSAT, and compound semiconductor applications.

<0.1 ppb
Total metals G5 grade
From 180nm mature node to sub-3nm EUV — complete SEMI C1 certified chemistry

Key Challenges

What Makes Semiconductor & IC Fabrication Chemistry Demanding

01

Metal Contamination

Even sub-ppb metallic impurities at gate oxide interfaces cause threshold voltage shift and yield loss. G4/G5 grade with ICP-MS verification is mandatory for all front-end process steps.

02

Particle Control

Post-CMP and post-etch rinse steps require particle counts below 10 ct/mL at ≥0.5 μm. In-line LPC certification during ISO Class 3 fill ensures contamination-free delivery.

03

Supply Consistency

Lot-to-lot variation in trace metal levels causes process excursions. PureTech SPC-controlled manufacturing delivers ≤10% variation on all critical parameters.

04

EUV Compatibility

EUV resist solvents require total metals below 0.1 ppb and acidity below 5 ppm to prevent scanner optic contamination. G5 PGMEA and G5 IPA are validated for EUV tool maintenance.

Process Mapping

Step-by-Step Chemical Guide

01

Piranha (SPM)

H₂SO₄ + H₂O₂

Hot sulfuric-peroxide mixture strips organic and photoresist residues before diffusion and post-implant.

02

RCA SC-1 (APM)

NH₄OH + H₂O₂ + H₂O

Ammonium-peroxide mixture removes particles and organic contamination. 1:1:5 ratio at 65–75°C.

03

RCA SC-2 (HPM)

HCl + H₂O₂ + H₂O

Hydrochloric-peroxide removes metal ion contamination. 1:1:6 ratio at 65–75°C.

04

Litho EBR / Coat

PGMEA / PGME

Edge bead removal and primary solvent for ArF immersion and EUV photoresist.

05

Resist Strip

NMP / Acetone

Thick positive photoresist stripping. NMP G4 at 80°C for thick films.

06

CMP Post-Clean

IPA (SRD)

Brush scrub and spin-rinse-dry after Cu/W/SiO₂ CMP.

07

Marangoni Dry

IPA G5 Vapor

Watermark-free final drying. Essential for sub-5nm and MEMS.

FAQ

Frequently Asked Questions

What SEMI grade IPA do I need for 7nm node CMP post-clean?

G4 (≥99.999%) or G5 (≥99.9999%) IPA is required for 7nm and below. G4 provides total metals ≤0.5 ppb and particles ≤10 ct/mL. G5 is specified for Marangoni drying and EUV tool maintenance where metals must be below 0.1 ppb per element.

What is the difference between SEMI C1 G4 and G5?

G4 (SEMI C1 Tier C): assay ≥99.999%, metals ≤0.5 ppb, particles ≤10/mL, water ≤10 ppm. G5 (SEMI C1 Tier D, 6N): assay ≥99.9999%, metals <0.1 ppb, particles ≤5/mL, water ≤5 ppm. G5 is specified for sub-7nm nodes, EUV, and Marangoni drying.

How do you verify metal content in electronic grade IPA?

ICP-MS quantifies 28 individual elements per production lot including Na, K, Fe, Cu, Cr, Ni, Al, and Zn. Detection limits are below 0.01 ppb for critical elements. Every lot ships with a CoA containing actual measured ICP-MS data — not pass/fail statements.

What packaging sizes are available for electronic grade IPA?

PureTech supplies IPA in 4L, 18L, 200L drums, 1000L IBCs, and bulk tanker. N₂ blanket is maintained throughout transport for G4/G5 grades. Dedicated tanker with full N₂ blanketing available for fabs consuming >50 MT/month.

Related Search Topics

semiconductor wet chemicalselectronic grade IPA semiconductorSEMI C1 supplierwafer cleaning chemicalssemiconductor chemical manufacturer Chinabuy SEMI G5 IPARCA cleaning chemicalsCMP post-clean IPA

Semiconductor & IC Fabrication Supply

Ready to Qualify for
Semiconductor & IC Fabrication?

Request sample lots with full CoA, ICP-MS data, and process-specific FAE support.